1. Field of the Invention
The present invention relates to a flash memory system, and, more particularly, to a log-based FTL and an operating method thereof, capable of improving performances of a reading operation, a writing operation, and an erasing operation, and extending life of a flash memory.
2. Description of the Related Art
The flash memory, which is one of non-volatile memories, has advantages of both a read only memory (ROM) capable of conserving data even without power and a random access memory (RAM) for freely inputting and outputting data. Also, the flash memory consumes less power than a hard disk, stably conserves stored data against severe impact or vibration, has a small size and lightweight, and has a fast access speed.
Despite the above-described advantages, the flash memory has a problem that a writing operation cannot be performed on a space on which a writing operation has been already performed due to its hardware characteristics. That is, an erasing operation for emptying a relevant space should be performed first in order to perform a writing operation again on a space already used. Also, the flash memory has a problem that a writing operation and an erasing operation cannot be performed continuously because a unit of the writing operation is different from that of the erasing operation.
For example, a general flash memory has a plurality of blocks including physical pages of 32 or 64. A reading operation and a writing operation are performed by a physical page unit, but an erasing operation is performed by a block unit. As known from the above description, units by which the reading and writing operations are performed are different from a unit by which the erasing operation is performed, so that the writing operation and the erasing operation cannot be performed continuously.
The above described problems not only make using a flash memory as a main memory difficult but also make directly utilizing a file system for a general hard disk difficult even when a flash memory is used as an auxiliary memory device as illustrated in FIG. 1.
Therefore, according to a prior art, a flash memory system has a flash translation layer (FTL) 110 located between a flash memory 100 and a file system 120, the FTL 110 provides to map a logical address generated by the file system 120 into a physical address of the flash memory 100.
At this point, the FTL 110 can be realized in the form of an independent hardware physically separated from a host device, or in the form of a device driver mounted inside the host device.
The above-described address translation function of the FTL allows the host device (not shown) to recognize the flash memory 100 as an auxiliary memory device such as a hard disk and to access the flash memory 100 in the same manner as in the hard disk.
FIG. 2 is a view explaining a method for operating a flash memory system including an FTL according to an embodiment of the prior invention.
Referring to FIG. 2, the FTL 210 includes a blockmap in which mapping relationship between logical addresses and physical addresses. A flash memory 220 includes two kinds of blocks of a data block and a replacement block. At this point, the number of replacement blocks corresponding to one data block is not limited.
Accordingly, the FTL 210 obtains a physical address (PBN=0, offset=1) corresponding to a logical address (LBN=1, Offset=1) with reference to the blockmap. But, when a relevant region is invalid, the FTL 210 accesses Offset=1 of a replacement block (block 5) corresponding to a data block (block 0).
However, since the FTL 210 of FIG. 2 assigns a new replacement block whenever the same offset is obtained, and an erasing operation is performed on a physical page not used when there is no replacement block that can be assigned. Therefore, there has been a problem that utilization of a replacement block reduces.
Accordingly, a space-efficient FTL is proposed to reduce a space of the flash memory that is unnecessarily wasted by the FTL of FIG. 2.
FIG. 3 is a view explaining a method for operating a flash memory system including a space-efficient FTL according to a prior art.
Referring to FIG. 3, the space-efficient FTL 310 uses a hybrid method including a blockmap for translating a logical address and a pagemap for using a log-scheme for a frequently updated block. The flash memory 320 includes two kinds of blocks of a data block and a Logblock. The data block (block 0) stores general data, and the Logblock (block 5) temporarily stores frequently updated data.
Accordingly, the space-efficient FTL 310 obtains a physical address (PBN=0, offset=1) corresponding to a logical address (LBN=1, Offset=1) with reference to the blockmap. But, when a relevant region is invalid, the FTL 310 accesses PPN=0 of the Logblock (block 5) corresponding to a data block (block 0) with reference to the pagemap.
Since the space-efficient FTL assigns and uses a Logblock instead of a replacement block, it should merge a data block and a Logblock when the Logblock is filled completely.
However, a great number of reading and writing operations occurs during a merging operation at this point, and the number of erasing operations naturally increases according to increses the number of writing operations occur.
Therefore, the lifetime of flash memory is reduced.